1. Field of the Invention
This invention relates to a display device, and more particularly to a standard signal processing apparatus suitable for a digital display device
2. Description of the Related Art
Generally, a display device transmits synchronizing signals H and V along with image signals to a display panel to display a picture. To this end, the display device requires three data transmission lines R, G and B for transmitting a data for each of red(R), green(G) and blue(B) signals involved in the image signals and two synchronizing transmission lines for transmitting the synchronizing signals H and V.
However, as the number of signal transmission lines for the image signals R, G and B and the synchronizing signals H and V goes larger in the display device, a band width is more reduced. In order to solve the problem concerning the reduction in the band width, the display device employs a synchronous on green (SOG)/composite (COMP) signal processing system. The COMP system is a system of transmitting two synchronizing signals H and V over a single line, which makes an exclusive logical sum operation of the vertical synchronizing signal V and the horizontal synchronizing signal H to generate a composite synchronizing signal HV. Accordingly, since the COMP system transmits the composite synchronizing signal HV over a single line, the image signals R, G and B and the composite synchronizing signal HV is transmitted to the display panel using total four lines including three lines for a transmission of the R, G and B image signals.
The SOG system is a transmission system of carrying the composite synchronizing signal HV in a line transmitting a green(G) image signal of the three lines used to transmit the R, G and B image signals. Since the SOG system transmits the composite synchronizing signal HV and the green(G) image signal over a single line, it requires total three lines for a transmission of the R, G and B image signals and the H and B synchronizing signals.
Referring to FIG. 1, the conventional standard signal processor includes a synchronizing signal/image signal separator 2 for receiving a SOG/COMP signal from an input terminal 1 to separate it into a composite synchronizing signal HV and image signals R, G and B, a synchronizing signal separator 4 for separating the composite synchronizing signal HV from the synchronizing signal/image signal separator 2 into a vertical synchronizing signal V and a horizontal synchronizing signal H, and a display 6 for displaying the image signals R, G and B from the synchronizing signal/image signal separator 2 in accordance with the synchronizing signals H and V from the synchronizing signal separator 4. The synchronizing signal/image signal separator 2 separates a SOG/COMP signal inputted from the input terminal 1 into the composite synchronizing signal HV and the image signals R, G and B. The image signals separated from the synchronizing signal/image signal separator 2 are transmitted to the display 6, and the composite synchronizing signal HV is transmitted to the synchronizing signal separator 4. The synchronizing signal separator 4 separates the composite synchronizing signal HV transmitted from the synchronizing signal/image signal separator 2 into horizontal and vertical synchronizing signals H and V. The horizontal and vertical synchronizing signals H and V separated from the synchronizing signal separator 4 are transmitted to the display 6. The display 6 is synchronized with the horizontal and vertical synchronizing signals H and V inputted from the synchronizing signal separator 4 to display a picture corresponding to the image signals R, G and B. The standard signal processor having the configuration as mentioned above is applicable to an analog system display device. A digital driving is needed with the development of a display device technique. Accordingly, a novel standard signal processor suitable for a digital driving is required.
Accordingly, it is an object of the present invention to provide, a standard signal processing apparatus for a digital display that is adaptive for a digital display device.
In order to achieve these and other objects of the invention, a standard signal processing apparatus for a digital display according to an embodiment of the present invention includes a synchronizing signal/image signal separator for separating an input signal into a composite synchronizing signal and image signals; a synchronizing signal separator for separating the composite synchronizing signal into the horizontal and vertical synchronizing signals; a clock generator for generating a clock signal using any one of the horizontal synchronizing signal and the composite synchronizing signal; and a display for receiving the clock signal, the image signals and the horizontal and vertical synchronizing signals to display a picture.
A standard signal processing apparatus for a digital display according to another embodiment of the present invention includes a synchronizing signal/image signal separator for separating the input signal into a composite synchronizing signal and image signals; a synchronizing signal separator for receiving the composite synchronizing signal to extract a first vertical synchronizing signal; a clock generator for receiving the composite synchronizing signal to generate a clock signal; a matcher for generating a horizontal synchronizing signal synchronized with the clock signal and a second vertical synchronizing signal synchronized with the horizontal syhchronizing signal and for converting the image signals into a digital data; and a display for receiving the horizontal synchronizing signal, the second vertical synchronizing signal, the digital data and the clock signal to display a picture.